New test for finding missing +2A/+3 ULA timing details

Hello,

having added the +2A/+3 emulation recently, I want to make sure I got the ULA timing 100% right. We know when the contention pattern starts, but I have found no reliable information about when the ULA actually fetches the screen bytes. Obviously the floating bus can't be used to find this info in this case, however I have prepared new test which can be used to figure this out by paging the shadow screen in and out.

I would really appreciate if some +2A/+3 owner would run the ptime test from this archive (src available) and use the Q and A keys to find and report the following:
- the last T cycle when there is no black bar visible.
- the first T cycle when the black bar appears and its length.
- the length of the black bar for each of the following 16 cycles.
- at which cycles the blue pixels in each colored block disappear, if at all.

Also, to make sure we know whether the tested machine uses early or late CPU timing, please run the btime test from the same archive and report the first T cycle when the red bar aligns exactly with the blue block.

Thanks a bunch.

Patrik